Author(s) Details:
Chaitanya Kommu
Department of EEC, GITAM University, Visakhapatnam, AP, India.
A Daisy Rani
Department of Instrument Technology, Andhra University, Visakhapatnam, AP, India.
This section is a part of the chapter: Presenting the Design of Low-Power High-Speed Two-Level Three input XOR Gate
Another way to realize the logic circuits is by using Pass Transistor Logic (PTL) as shown in Fig. 2. One input is applied at ‘A’ and the other input is at ‘B’, and signal ‘Y’ is taken as output. It is more attractive to circuit realization in terms of utilization of less number transistors (Yano et al. (1990), Oklobdzija and Duchene (1995), Marković, Nikolić, and Oklobdžija (2000), Wu (1992).
How to Cite
Kommu, C., & Rani, A. D. (2025). Presenting the Design of Low-Power High-Speed Two-Level Three input XOR Gate. Science and Technology: Developments and Applications Vol. 5, 1–14. https://doi.org/10.9734/bpi/stda/v5/2365